| #1671115 in Books | Springer | 2001-12-31 | Ingredients: Example Ingredients | Original language:English | PDF # 1 | 9.21 x.88 x6.14l,1.60 | File type: PDF | 328 pages | Example Bullet Point 1 | Example Bullet Point 2||3 of 3 people found the following review helpful.| hands on guide|By Wynn|This book is geared towards the synopsys synthesis tools (as evident in the title). It gives brief explanations about vhdl and verilog coding style (which can be found in many other books).
The actual useful part was that the book explored the commonly used synthesis commands in synopsys, and also had explanations on the steps to follow to succ
Advanced ASIC Chip Synthesis: Using Synopsys® DesignCompiler® Physical Compiler® and PrimeTime®, SecondEdition describes the advanced concepts and techniques used towards ASIC chip synthesis, physical synthesis, formal verification and static timing analysis, using the Synopsys suite of tools. In addition, the entire ASIC design flow methodology targeted for VDSM (Very-Deep-Sub-Micron) technologies is covered in detail. ...
You easily download any file type for your device.Advanced ASIC Chip Synthesis: Using Synopsys® Design Compiler™ Physical Compiler™ and PrimeTime® | Himanshu Bhatnagar. I have read it a couple of times and even shared with my family members. Really good. Couldnt put it down.
